Noise Analysis of Readout Chain in FDSOI-based 1T-APS for In-Sensor Vector-Matrix-Multiplication

A noise analysis scheme for readout chain of Fully-Depleted Silicon-on-Insulator (FDSOI) based one transistor active pixel sensor (1T-APS) has been proposed. Both shot noise and read noise in pixel and the transfer function of column level circuit are modelled and calibrated to describe the signal-to-noise (SNR) behavior. The SNR behavior with gate length decreasing is predicted (Peak SNR 39.8 dB @ L 60nm). The noise analysis enables accuracy recovery for in-sensor VMM assisted deep learning through noise participating in hardware-aware training and shows little deviation from baseline (<0.5% for Cifar-10 @ VGG11).