This paper addresses the limitations of traditional CMOS-based hardware security primitives by proposing an integrated physical unclonable functions (PUFs) and true random number generators (TRNGs) design utilizing the MTJ with vortex spin-torque nano oscillator (V-STNO) functionality. Considering the variation in V-STNO frequencies, the uniqueness and reliability of PUF are calculated as 50.3% and 97.41%, respectively. It demonstrates compactness with a relatively lower gate count and achieves low power consumption at 2.4 μ W per bit.
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Das et al. (2024) studied this question.
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