This article investigates the I-V hysteresis (IVH) phenomenon in MOSFETs and the factors affecting it. The study focuses on the effects of oxide traps, interface traps, and "border traps" on metal-oxide-semiconductor devices. The current paper also discusses a comprehensive method for separating the effects of interface traps and trapped oxide charge in metal-oxide-semiconductor transistors. According to the study border traps and bias-temperature instabilities in MOS devices are significant factors affecting IVH. The findings of this study can be useful in the MOSFET design and optimization of for various applications.
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Chukhraev et al. (2024) studied this question.
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