CeConP: Exploring Node Centrality for Early Routing Congestion Prediction

As the size and complexity of integrated circuits increase, designing them becomes increasingly challenging. The correlation between the initial and final stages is crucial for efficiently converging the design flow and avoiding turnaround time. Providing a circuit layout design with complete routing closure poses a significant challenge due to issues like wire congestion and design complexity. Congestion estimation tools provide prediction metrics, such as routing congestion, guiding design convergence. In this work, we present a tool for early routing congestion prediction using logic synthesis data and harnessing the potential of graph neural networks. Our approach delves into an examination of feature selection, considering features stemming from both logic synthesis and node centrality and evaluating their impact on prediction quality. Compared to two prior studies, our results exhibit Kendall correlation values more than twice higher under similar conditions. This highlights the potential for investigating node centrality features in routing congestion prediction.