Impact of Dual Oxide on Charge Plasma-based Junctionless Tunnel Field Effect Transistor

To enhance the device's DC and analog/radio frequency performance characteristics, we explored dual oxide (DO) structure on charge plasma-based junctionless tunnel FET and termed it DO-CP-JL-TFET in this work. This method involves the segmentation of the oxide layer into two distinct sections, namely SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> and HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> . The dual oxide (DO) enhances the capacitive coupling across the gate-channel area while reducing the width of the tunneling barrier at the channel-source area. This results in an increase in the tunneling current which improves ON current, subthreshold slope (SS), and other parameters. The aforementioned provisional outcomes were achieved with the SILVACO ATLAS TCAD. In addition, the oxide thickness of the device has been tuned to select the most efficient tunneling. Therefore, the suggested device has minimal power consumption within circuits and can exhibit better performance at high frequencies.