24.2 A Scalable 134-to-141GHz 16-Element CMOS 2D λ/2-Spaced Phased Array

Utilizing the spectrum >100 GHz will remarkably enhance the capacity of future 5G/6G wireless access networks. However, the antenna effective aperture is proportional to λ² (λ: carrier wavelength). Then, millimeter-wave, large-scale CMOS phased-arrays are indispensable to overcome the associated 30-to-40dB higher path loss, compared with sub-6GHz devices. To this end, several challenges remain to be addressed: 1) Scalability: a physically resizable phased array with 10 ¹-to-10 ³ elements is preferred over a monolithically integrated large array [1]; 2) Array spacing d=λ /2 [2, 3], instead of d > λ /2 [1, 4], reduces the sidelobes and the adjacent user interference; 3) DC-to-RF efficiency enhancement; 4) Cost reduction: avoiding advanced processes and expensive packaging [1, 2, 4, 5]. In this paper, a 134-to-141GHz, 16-element, 2D λ /2-spaced phased-array transmitter in a 65nm CMOS process is demonstrated. A scalable IF beamforming scheme with traveling-wave LO/IF distribution is proposed for flexible 2D array expansion. Next, a D-band transmitter per channel is built. It adopts a subsampling tripler to address the LO degradation and enhance the DC efficiency. In addition, a broadband, triple resonance on-chip antenna with asymmetric H-shape patch on quartz superstrate reduces the antenna area by 42%, which enables the λ /2 spacing. At 138GHz, the measured 4 × 4 2D λ /2-spaced phased array presents a peak equivalent isotropically radiated power (EIRP) of 26dBm with 1dBm RF output power per channel, and a +/−40° beam steering in both directions. A line-of-sight (LoS) transmission of 14Gbit/s, 16-QAM signal over 10m distance has been demonstrated with an error-vector-magnitude (EVM) of 9.8%.