Application-level temperature cycling reveals reliability issues in FOWLP designs, suggesting the need for optimized dielectric materials.
Fan Out Wafer Level Package (FOWLP) developed in this work passed all standard industrial/automotive grade 1 reliability qualification requirements. Development studies included Design of Experiments (DOE) variables like; die/package ratio, package designs, dielectric materials, and solder alloys. To emulate product reliability in the field, application-level temperature cycling (AL-TC) was done where the test devices were mounted on a translation board (TLB). The TLB stack up and routing were like a typical customer board design. For AL-TC different performance was observed in the DOE legs. For some DOE legs reliability was passed for automotive grade 1. For other DOE legs open and leakage fails were observed after AL-TC reliability. Modelling confirmed the failure location to be coincident with the highest die peel stress location in the package. The failure mode was Back End of Line (BEOL) delamination under the die bond pad which was related to high die peel stress. The failure root cause was attributed to stress induced by one of the package dielectric materials having a high Coefficient of Thermal Expansion (CTE) and high storage modulus at -40°C, which is the maximum stress point in the thermal shock cycle. The same failure mode was not observed in daisy chain design-based board level temperature cycling reliability.
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Sharma et al. (2025) studied this question.
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