SiC MOSFET Switching Dynamics and Power Conversion Loss Characterization Under Parametric Variations

In pursuit of enhancing the performance of power converters, high-frequency power devices have become indispensable due to their superior switching capabilities, reduced conduction loss, and enhanced thermal performance. However, optimizing their efficiency requires a profound comprehension of the interplay between various parameters (the current, voltage, and gate resistance) on switching dynamics and power losses. This study presents a comprehensive framework of loss characterization with multi-parametric variations. The influence of drain-source current (Ids), DC voltage (Vdc), and gate resistor (Rg) on switching and conduction losses are explicitly quantified. A significant contribution of this study lies in the comprehensive analytical and empirical characterization of the turn-on and turn-off power dissipation dynamics in SiC MOSFETs, emphasizing the intricate interplay between parameters and efficiency. Conventional studies primarily focus on empirical loss characterization, yet this work advances the field by introducing a predictive loss model that systematically correlates Rg, Ids, and Vdc variations with induced switching dynamics, and EMI mitigation strategies. Increasing Rg effectively suppresses voltage overshoots and mitigates ringing effects, concurrently prolonging switching events, thereby broadening the power dissipation profile and influencing system-level performance. Furthermore, this study rigorously evaluates the commutation behavior of the SiC MOSFET/SBD pair, providing an in-depth examination of its dynamic loss characterization under varying conditions. This novel insight establishes a crucial framework for efficiency drive optimization.