What question did this study set out to answer?

The aim is to develop resource-efficient architectures for 2D convolution using kernel separability techniques.

High-performance 2D convolution architectures based on kernel separability

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Novel architectures reduce power and resource usage in 2D convolution, indicating improved efficiency in image processing applications.

The aim is to develop resource-efficient architectures for 2D convolution using kernel separability techniques.
Developed two architectures: folded separable convolution and register minimized folded separable convolution.
Implemented preprocessing techniques, including retiming, to achieve timing closure in convolutions.
Minimized register usage to enhance efficiency without increasing complexity.
Tested architectures on various FPGA devices such as Artix-7 and Virtex-7.
Achieved significant reductions in power dissipation and memory bandwidth compared to existing architectures.
Reduced hardware utilization and improved timing performance.
Slight decrease in throughput observed, balanced by lower resource requirements.

Hassan et al. (2026) studied this question.

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