Examines how varying silicon dioxide thickness affects the mobility of thin film transistors, suggesting crucial design considerations.
Solution-based process has become an emerging way to fabricate metal oxide thin film transistors (TFTs) owing to its low cost, use of inexpensive equipment, and vacuum-free nature. Silicon oxide wafers are commonly utilized in the solution-based process to evaluate the electrical properties of metal oxide semiconductors. However, the impact of silicon dioxide thickness on the mobility of TFTs remains unclear. Here, a solution-based surface energy-directed assembly process is utilized to fabricate crystalline indium oxide (In2O3) patterns on silicon oxide wafers with various thicknesses. TFTs are constructed using the In2O3 patterns as semiconducting channel layers and the silicon dioxide films as dielectric layers. Statistical analysis of 50 independent TFTs demonstrates that the thickness of the oxide layers affects the extracted mobility significantly. Specifically, as the oxide thickness decreases from 300 to 50 nm, the mobility increases by almost two orders of magnitude from 5.2 × 10−2 to 3.3 cm2 V−1 s−1. The reason for the increased mobility lies in the higher ratio of free carrier density at the semiconductor/dielectric interface, accompanied by a reduction in the trapped carrier density from 5.61 × 1011 to 3.97 × 1011 cm−2. These findings quantify the significant correlation between dielectric thickness and extracted mobility, providing essential guidelines for the reliable electrical evaluation of solution-processed oxide semiconductors.
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Yuan et al. (2026) studied this question.
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