In MOSFETs, the gate leakage current induced by direct tunneling through the gate oxide layer has become a critical factor affecting device reliability and power consumption. This paper systematically investigates the leakage current noise characteristics and their evolution mechanisms in NMOS devices with 4 nm gate oxide thickness before and after electrical stress. A high-sensitivity current noise measurement system was established to analyze the noise spectra under various bias voltages. Combined with the stress-induced leakage current (SILC) phenomenon, the activation and evolution of oxide traps were explored. Experimental results reveal that prior to stress, the noise power spectral density exhibits typical 1/f characteristics, with the γ value close to unity within the bias range of 0.7–1.0 V, indicating that direct tunneling dominates the noise mechanism. After applying a 3 V, 10 s high-field stress, significant SILC is observed, manifested by an upward shift of the I–V curve and a substantial increase in noise level across the entire frequency band. In the post-stress noise spectra, random telegraph signal (RTS) components induced by trap-assisted tunneling are observed, whose amplitude and frequency evolve with increasing bias, reflecting a microscopic transition from isolated trap activation to parallel multi-trap conduction paths. As the bias voltage further increases, the RTS components gradually merge into the continuous 1/f noise spectrum, while the increase in the γ value indicates a broadening of the trap energy distribution. This study elucidates the generation and evolution mechanisms of traps in thin gate dielectrics under high-field stress, establishes the correlation between leakage current noise spectral characteristics and device degradation, and provides important experimental insights for reliability assessment and noise suppression in nanoscale MOSFETs.
Ding et al. (Sun,) studied this question.