Reconfigurable Large‐Scale Optoelectronic Reservoir Computing on Programmable Silicon Photonic Processor

The ever‐growing demand for artificial intelligence (AI) acceleration has motivated research on novel photonic neuromorphic computation architectures, aiming for breakthroughs in computation speed and energy efficiency. Reservoir computing (RC), a hardware‐friendly and training‐efficient paradigm, has emerged as a compelling candidate. However, existing photonic RC systems, whether in time‐multiplexed single‐node implementations or passive parallel interconnections, suffer from fixed reservoir connections, which significantly constrain their adaptability and computational versatility across tasks. Here, we propose a reconfigurable optoelectronic RC system featuring a multi‐physical node architecture, constructed on a large‐scale programmable silicon photonic arithmetic computing engine. By integrating 64 physical nodes with tunable interconnect topology and connection density, the system allows flexible configuration of the reservoir layer tailored to specific computational demands. We further present a scalable deep RC architecture that expands the effective reservoir dimensionality to over 600 reservoir nodes. Operating at 1 GHz with 3 ns latency, the platform delivers 8.19 TOPS and excels across diverse applications. Experiments demonstrate state‐of‐the‐art results: 99.8% accuracy in modulation‐format identification over distorted channels, a 0.61 dB improvement in signal quality via nonlinear equalization, and 96.7% accuracy in image classification. This work provides a scalable, task‐adaptive solution for high‐speed neuromorphic computing, advancing the practical deployment of photonic intelligence.