A 16-Level Digital Trimmable CMOS 65nm Bandgap Reference with Process, Voltage, and Temperature Stability

A 65nm CMOS trimmable bandgap reference (BGR) circuit is developed to deliver stable reference voltages of 0.65V, with a supply voltage range of 1.5V to 3.6V. A key contribution is the incorporation of a 16-level 4-bit digital trimming circuit, allowing fine adjustment of the reference voltage. The trimming circuit employs a decoder and multiplexer structure to select different points along a resistor ladder, enabling post-manufacturing voltage tuning to compensate for process variations. This methodology ensures precise control of the output voltage, improving accuracy and reliability under varying conditions. The design aims to achieve a phase margin greater than 45°, a temperature coefficient below 2.5mV, and low current consumption under 6µA across Process, Voltage & Temperature (PVT) variations. The workflow includes calculating MOSFET and passive component parameters, designing the schematic of a single-stage operational amplifier and the trimmable BGR circuit, followed by pre-layout simulations. The pre-layout results show a DC gain of 60.88dB and a phase margin of 63° for the op-amp. The temperature coefficient for the 0.65V reference voltage trimmable BGR is 1.67mV across Process, Voltage & Temperature (PVT), with current consumption remaining below 6µA. Considering the degraded circuit performance caused by the process & manufacturing deviation, the addition of the trimming circuit significantly enhances the design's adaptability, ensuring it meets the performance targets even in the presence of manufacturing variations which allow us trim the affected output voltage back to desired voltage where in this work we set it at 0.65V.