Experimental study demonstrates ultrathin molybdenum trioxide dielectrics in 2D transistors, suggesting a scalable route for post-silicon digital logic circuits.
The integration of two-dimensional (2D) semiconductors with high-κ dielectrics is critical for the development of post-silicon electronics. The key challenge lies in developing an ultra-thin high-κ dielectric with damage-free interface and sub-1 nm equivalent oxide thickness (EOT) for further continuation of Moore's law. Here we report the thickness-controlled free-standing growth of layered MoO₃ dielectrics with EOT down to 0.9 nm and high permittivity beyond 40, and their application in 2D electronic devices. The MoS₂ transistors with MoO₃ as high-κ gate dielectric exhibit a high on/off ratio close to 10⁸, low subthreshold swing of 78 mV/dec and low leakage current below 10⁻⁴A/cm². By further vertically stacking n-MoS₂ with p-WSe₂ transistors, the complementary metal-oxide-semiconductor (CMOS) inverters are achieved, demonstrating its application potential in high-density digital logical circuits. This work develops the controllable growth of high-κ MoO₃ dielectrics with ultra-thin EOT, advancing the development of high-performance, size-shrinking and low-power 2D electronics.
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Li et al. (2025) studied this question.
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