Design and Simulation of GaN Superjunction Transistors With 2-DEG Channels and Fin Channels

High-performance 2-D-electron-gas (2-DEG) channel and submicron fin-shaped channel have recently been demonstrated in vertical GaN power transistors. This indicates that, unlike Si and SiC, the inversion-type metal–oxide–semiconductor channel is no longer the “default option” for future GaN superjunction transistors. This paper demonstrates the design and simulation of GaN superjunction transistors with 2-DEG and fin channels, i.e., a superjunction current-aperture vertical electron transistor (SJ-CAVET) and a superjunction fin field-effect-transistor (SJ-FinFET). A breakdown voltage over 2.2 kV and a specific on-resistance ( <tex-math notation="LaTeX">RON,sp </tex-math> ) of <tex-math notation="LaTeX">0.35~mΩ · cm² </tex-math> were demonstrated in the simulated GaN SJ-CAVETs and SJ-FinFETs with 10- <tex-math notation="LaTeX">μ m </tex-math> -thick superjunction region. Mixed-mode simulations were used to evaluate their performance in 1.7 kV, 50-A power switching applications. Their <tex-math notation="LaTeX">RON,sp </tex-math> and die size are at least 30-to-50-fold smaller than that of today’s best 1.7-kV power transistors. Thanks to the smaller die size, the junction capacitances and switching charges are significantly smaller, allowing for a megahertz practical switching frequency which is at least tenfold higher than today’s 1.7-kV power transistors. The simulations of higher voltage GaN SJ-CAVETs and SJ-FinFETs up to 10 kV reveal consistent advantages over commercial transistors. These results show the great potentials of GaN SJ-CAVETs and SJ-FinFETs for future medium-voltage high-frequency power applications.