We demonstrate the first GaN vertical transistor on silicon, based on a 6.7- <tex-math notation="LaTeX">μ m </tex-math> -thick n-p-n heterostructure grown on 6-inch silicon substrate by metal organic chemical-vapor deposition. The devices consist of trench-gate quasi-vertical metal–oxide–semiconductor field-effect transistors with a 4- <tex-math notation="LaTeX">μ m </tex-math> -thick drift layer, exhibiting enhancement-mode operation with a threshold voltage of 6.3V and an ON/OFF ratio of over 10 8 . A high OFF-state breakdown voltage of 645 V along with a specific ON-resistance of <tex-math notation="LaTeX">6.8~mΩ · cm^2 </tex-math> were achieved thanks to the high-quality 4- <tex-math notation="LaTeX">μ m </tex-math> -thick GaN drift layer, presenting a relatively low defect density and very high electron mobility (720 cm <tex-math notation="LaTeX">^2/V· s </tex-math> ). This excellent performance represents a major step toward the realization of high-performance GaN vertical power transistors on low-cost silicon substrates.
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Liu et al. (2017) studied this question.
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