Reproduction Log: Zero-Allocation 256-bit Arithmetic on Apple M4 — Step-by-Step Derivation of the NALP Carry-Select Implementation

Complete derivation log documenting the step-by-step discovery of zero-allocation 256-bit carry-select arithmetic on Apple M4 unified memory architecture. Includes all six failed limb extraction attempts, error analysis, and the working NTuple implementation achieving 2.250 ns median latency with 0 bytes allocation. Companion document to: Askamp, N. (2026). Beyond the Carry-Chain: Constant-Time Parallel-Prefix Bignum Arithmetic on ARM Unified Memory Architectures. Canonical Result Hash (pi + e, 256-bit): 03c68ec2283606656347ad28a8abf044cc29a837f9adb91ba18d390417ff5349Stack Integrity Hash (manifest, 37 files): dd76dc54c1c23c46b5aebf9582237ab5acb672eaa59da67cb8dbe274c7866bd5