Empirical study determines circuit-depth limits in quantum circuits, suggesting optimal configurations for high fidelity.
We present an empirical study of circuit-depth thresholds on IBM Quantum Heron-class hardware using 4- and 5-qubit GHZ-state preparation circuits with logical depths from 2 to 20. On ibm_torino, we observe qubit-count-dependent depth limits: 4-qubit circuits reach a fidelity plateau near 88% beyond depth 10, while 5-qubit circuits show continued decay from 89.4% to 83.7% over the same range. The observed fidelity at depth 20 substantially exceeds predictions from an independent gate-error model (88% vs. 61%), indicating coherent error effects and partial error cancellation not captured by simple accumulation models. These results provide hardware-specific depth bounds for near-term quantum circuits and support calibration-based depth selection over fixed heuristics. We recommend a maximum depth ≤ 10 for applications requiring >85% fidelity on this hardware.
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Jeorge D. Anderson II (2026) studied this question.
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