Short‐Circuit Current Analysis of Grid‐Connected Inverters: An Analytical Approach Using Hardware Natural Response and Control Superposition

Predicting sub‐cycle transient peak currents from inverters within the first few milliseconds after fault inception is essential for instantaneous overcurrent protection coordination, yet the most commonly used standard for short‐circuit calculation, like IEC 60909‐0 and ANSI C037.010 addresses only quasi‐steady‐state currents. This paper proposes a closed‐form analytical framework that decouples inverter fault current into hardware natural response and control‐commanded response. The hardware natural response, governed by inverter output filter and passive grid resonances, dominates the first transient peak and requires only nameplate and filter data—no proprietary controller information. The control‐commanded response, shaped by the current loop, phase‐locked loop and fault ride‐through strategy, governs subsequent waveform evolution. Building on unified hardware modelling, the framework extends separately to grid‐following and grid‐forming inverters. Validation against electromagnetic transient simulations and power hardware‐in‐the‐loop tests on three commercial inverters confirms prediction accuracy.