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A multilevel thin-film process has been developed for fabricating experimental circuits containing Josephson tunneling gates, insulated crossings, superconducting contacts, and terminating resistors. The process utilizes a Nb film for the ground plane and Pb alloy films for overlying superconducting layers. Insulation is achieved through the use of vacuum-deposited SiO films and anodization of the Nb ground plane. An oxide formed by rf sputter-etching in an oxygen plasma is used for forming the tunneling barriers. Photoprocessing techniques are used for patterning. Through use of the process it has been possible to fabricate experimental memory and logic circuits which survive thermal cycling to 4.2 K and intervening storage at room temperature without significant changes in electrical characteristics.
Greiner et al. (Tue,) studied this question.