Quantum flux parametron (QFP) shift registers employing four-phase clocking are designed. In order to generate subharmonics of a given clock frequency, one to four single-bit shift registers are cascaded in a closed-loop configuration. The clock is obtained by shorting the end of the microstrip clock lines, and is applied as a standing wave. Using this scheme it is observed that for some frequencies, the crosstalk between the output and clock signals is dramatically reduced. The clock current amplitude margin is deduced from the maximum operating frequency of some of the devices; it is at least 17% at operating frequencies beyond 5 GHz. The 1-bit device is observed to operate from DC up to 16.2 GHz and the 4-bit shift register structure functions at frequencies over 5 GHz.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Casas et al. (1992) studied this question.
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