Key result
The modified folded cascode OTA architecture achieved lower power consumption and delay at a biasing voltage of 0.7V compared to existing folded cascode OTA methods.
The proposed modified folded cascode OTA design demonstrates improved power efficiency and reduced delay at low biasing voltages (down to 0.7V), making it suitable for low-power biomedical wearable devices.
May aid low-power wearable sensors; leaves open clinical validation in cardiovascular devices.
This paper presents an optimized methodology to modified folded Cascode operational trans conductance amplifier (OTA) design. The design is done in different regions of operation, weak inversion, strong inversion and moderate inversion using the gm/ID methodology in order to optimize MOS transistor sizing. This new family of OTA designs is suitable for biomedical and healthcare circuits and systems, due to the high energy-efficiency, improved gain and low level of noise contribution, when compared to the stateof- the-art in this field. In this paper, two fully-differential implementations are presented, a first one with a double CMOS branch biased by two pairs of voltage-combiners structures in both NMOS and PMOS configurations, and a second one with folded voltagecombiners specifically targeting low voltage applications. The folded voltage-combiners biased OTA is able to operate correctly under a voltage supply down to 0.7 V with proper DC biasing. The simulation is performed in HSPICE Synopsys Tool and compared with existing designs.
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Palagiri Kartheek (2022) studied this question. Modified folded Cascode OTA vs. Standard VCs, Folded VCs, and Folded Cascode OTA was evaluated on Power consumption and delay. The modified folded cascode OTA architecture achieved lower power consumption and delay at a biasing voltage of 0.7V compared to existing folded cascode OTA methods.
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