Successful integration of mixed analog-logic standard cells has been demonstrated in a 1.0- mu m CMOS-based technology. Considerations for analog cell area, power distribution, noise immunity, circuit library design, and product test are described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Smith et al. (1989) studied this question.
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