Demonstrates enhanced defect detection in semiconductor wafers, suggesting improved manufacturing quality control.
Semiconductor wafers constitute a critical substrate material for modern information-technology products, and surface defects can directly compromise chip yield and device reliability. In practical industrial settings, wafer defects are typically minute in scale and are characterized by low-contrast detail attenuation, severe background noise, and dense spatial distributions, which collectively hinder the stable extraction of discriminative features by existing visual inspection methods. To this end, a deep feature–enhanced Transformer-based detector, termed Wafer-DETR, is proposed. Specifically, a frequency–spatial collaborative enhancement backbone, FresNet, is constructed, where FFT-based spectral modeling is integrated with edge enhancement to reinforce defect details, thereby alleviating the progressive attenuation of low-contrast cues as network depth increases. In addition, a cross-scale adaptive fusion module, CSAF, is designed to improve defect focusing under heavy-noise conditions via dynamic gating. During feature reconstruction, a content-aware upsampling operator, CARAFE, is incorporated to strengthen boundary representations and mitigate adhesion among densely distributed defects. Experiments on a self-built wafer defect dataset collected from a real industrial production line, under a typical point-like micro-defect scenario, show that the proposed method achieves 79.7% average precision at an IoU threshold of 0.50 and 25.2% average precision averaged over IoU thresholds from 0.50 to 0.95, yielding absolute gains of 3.3 and 1.9 percentage points over RT-DETR, respectively. Overall, Wafer-DETR exhibits more stable detection performance in low-contrast, noisy, and densely defective scenarios, thereby providing effective technical support for automated visual quality inspection in wafer manufacturing.
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Wu et al. (2026) studied this question.
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