The proposed dual-loop eight-channel ECG recording system offers a compact, low-power solution with fast settling time for wireless real-time 12-lead ECG applications.
A dual-loop eight-channel electrocardiogram (ECG) recording system with the fast settling mode is proposed for wireless real-time 12-lead ECG applications. It employs the frequency division multiplexing (FDM) technique to achieve multichannel IA (MCIA). The FDM technique allows using smaller input capacitor and sharing of programmable gain amplifier (PGA), buffer, and ADC to achieve smaller area. To suppress the dc offset of bio-signal with faster settling, dual dc servo loops are proposed. The main loop employs the least-mean-square (LMS) algorithm in the digital domain to extract the dc offsets in different frequency channels. An auxiliary fast settling loop (FSL) in the analog domain can be enabled to shorten the settling time from 14 s down to only 0.6 s. A 16-bit ΣA ADC, including the decimation filter, is adopted to achieve high resolution and avoid using high Q anti-aliasing filter in the analog domain. The MCIA achieves 112.5-dB common mode rejection ratio (CMRR), 113.0-dB power supply rejection ratio (PSRR), and 1.44-μ Vrms noise performance. The MCIA occupies only 0.3 mm2 and consumes 60 μW for eight channels. The whole ECG recording system was implemented in 130-nm CMOS technology.
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Zeng et al. (2019) studied this question.
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