Wafer map pattern recognition using ternary spiking neural networks

The analysis of wafer map patterns is crucial for detecting manufacturing defects in integrated circuits. Although deep neural networks have been used for this task, spiking neural networks (SNNs) offer a more energy-efficient alternative by using spike activations, replacing multiplications with simpler additions. We develop an SNN with ternary spiking neuron model that outputs values of { − 1 , 0 , 1 } instead of the traditional { 0 , 1 } , to enhance the neuron’s information capacity and learning. It also improves the model’s control over the influence of each type of spike on the membrane potential, helping to prevent excessive activation and maintain stability by balancing excitatory and inhibitory signals. Using direct spike training with pseudogradients, our model outperforms both binary SNNs and DNNs on the WM-811k wafer benchmark dataset, excelling in identifying critical defect patterns that are underrepresented in the dataset with high accuracy and computational efficiency.