Hysteresis-Induced Performance Variations and Interfacial Charge Trapping Characteristics in Carbon Nanotube Thin-Film Transistors

Carbon nanotube (CNT) networks are promising candidate channel materials for thin-film transistors (TFTs). However, the charge trapping characteristics underlying the gate hysteresis effect still remain unclear. Herein, high-performance CNT TFTs with good consistencies were fabricated to investigate the hysteresis-induced performance variations and the dynamic charge trapping/releasing behaviors at different gate biases. Both the subthreshold and suprathreshold characteristics of the TFTs are remarkably changed under different gate sweeping directions. The origin of gate hysteresis was illustrated by comparing the effects of gas desorption and selective re-adsorption, and the adsorbed O2 and H2O make different contributions related to specific charge trapping characteristics. We further demonstrate that the dynamic charge trapping/releasing processes are governed by the applied gate biases, revealing the equivalency between the positive charge trapping and negative charge releasing processes, and vice versa. The time-dependent degradation of the on-state current has been fitted to perform a statistical analysis based on the measurement results of eight devices. Three characteristic time constants have been determined, corresponding to a multi-step trapping process that may be dominated by dielectric surface trapping and trap-assisted tunneling into the bulk defects in the dielectric layer near the CNTs and those in depth, respectively.