A Brief Survey on Hardware Implementation of Fully Homomorphic Encryption

Leveraging the favorable properties of cryptographic computation, FHE effectively ensures data availability without visibility, thereby holding broad application prospects in cloud computing security and data privacy protection. However, computational efficiency remains a critical bottleneck that constrains its practical deployment and further development. Consequently, research on hardware implementations of FHE has become a major direction in the cryptographic community. This paper first systematically reviews the research progress of FHE schemes, summarizing and analyzing the characteristics of representative FHE schemes. Subsequently, we survey and analyze hardware research progress and optimization techniques from the perspectives of overall accelerator architecture design, polynomial multiplier design, and integer modular multiplier design, highlighting the main advantages, disadvantages, and common features of different hardware structures. Finally, based on an analysis of existing hardware implementation architectures for FHE, this paper presents the potential deficiencies, summarizes and outlines future research directions and development prospects, aiming to further improve the operational performance of FHE hardware implementations.