Shows control of silicon thickness while maintaining crystalline order, indicating potential for future nanoelectronics.
Achieving atomic-scale control of silicon thickness while preserving crystalline order is a major challenge for next-generation nanoelectronic devices. In this work, a CMOS-compatible top-down thinning strategy based on sequential rapid thermal oxidation and hydrofluoric acid etching (RTO/HF) is developed to controllably reduce the thickness of silicon-on-insulator (SOI) substrates down to the sub-nanometer regime. Spectroscopic ellipsometry (SE) and X-ray photoelectron spectroscopy (XPS) demonstrate reproducible thickness reduction from 7.05 nm down to 0.77 nm. Atomic force microscopy (AFM) measurements reveal that the surface roughness remains low and nearly unchanged during thinning, with root-mean-square (RMS) roughness values in the range of 0.3–0.4 nm. Most importantly, low-energy electron diffraction (LEED) measurements provide direct evidence that the long-range diamond-cubic order of Si(001) is preserved within the LEED probing depth even when the total silicon thickness is reduced below 1 nm These results demonstrate that extreme top-down thinning can be achieved while maintaining structural and chemical integrity. The proposed RTO/HF approach therefore provides a scalable route toward ultra-thin crystalline silicon layers compatible with advanced CMOS device architectures.
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Kari et al. (2026) studied this question.
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