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In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temperature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 /spl times/ higher transconductance and /spl sim/ 40% hole mobility enhancement over the Si control with a thermal SiO/sub 2/ gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope.
Shang et al. (Tue,) studied this question.