Low-Temperature Monolithic Integration of a Polycrystalline Silicon Ferroelectric-Gate Field-Effect Transistor with Microwave-Annealed HfZrO x for Energy-Efficient Neuromorphic Computing

Owing to the physical and economic limitations of conventional scaling, monolithic three-dimensional (M3D) integration offers a promising route to enhance device density and performance. Integrating ferroelectric-gate field-effect transistors (FeFETs) into M3D architectures is challenging because dopant activation and ferroelectric crystallization usually require high temperatures that degrade bottom-tier devices. We propose a low-temperature M3D-compatible FeFET fabrication scheme employing a metal–ferroelectric–metal–interlayer–poly-Si stack. Laser annealing crystallizes the poly-Si channel, and microwave annealing (MWA) induces the ferroelectric orthorhombic phase in HfZrO x (HZO) while keeping the thermal budget below 400 °C. MWA enhances polarization, widens the memory window, and improves fatigue endurance and interface quality compared with rapid thermal annealing. Although MWA-treated FeFETs exhibit slightly slower switching, synaptic arrays show reliable multilevel conductance modulation and achieve >90% training accuracy on CIFAR-10 using a vision-transformer-based neuromorphic system, demonstrating a promising low-thermal-budget path for energy-efficient M3D neuromorphic computing.