Multi‐V th IGZO FETs Enabled by Continuous‐wave Laser Scanning Annealing for Low Thermal Budget 3D Integration

Indium‐gallium‐zinc‐oxide (IGZO) field‐effect transistors (FETs), owing to their excellent electrical performance and back‐end‐of‐line (BEOL) compatibility, are promising candidates for logic applications. Although various techniques have been extensively investigated to enhance IGZO FET performance, these approaches typically fall short in offering precise and scalable threshold voltage (V th ) control. In this study, we demonstrate multi‐V th IGZO FETs using continuous‐wave laser scanning annealing (CW‐LSA), a localized annealing process that allows V th to be precisely controlled without requiring additional process steps. The fabricated devices exhibit a high on/off current ratio (∼10 8 ), steep subthreshold swing (< 84 mV dec −1 ), and near‐zero V th (∼0 V), rendering them well‐suited for various logic circuit applications. By tuning laser power and scan speed, three distinct V th values, i.e., 0.22, 0.42, and 0.62 V (low, standard, and high V th , respectively), with excellent uniformity, are achieved on a single wafer (coefficient of variation between 2.17% and 6.61%). Moreover, the low thermal budget of the CW‐LSA process is successfully confirmed by fabricating IGZO FETs on polyimide substrates. These results highlight CW‐LSA as a scalable and BEOL‐compatible technique for enabling energy‐efficient multi‐V th logic circuits and for monolithic 3D system integration.