Multiple-input circuits that count the number of their inputs that are in a given state (normally logic ONE) are called parallel counters. In this paper three separate types of counters are described, analyzed, and compared. The first counter consists of a network of full adders. The second counter uses a combination of full adders and fast adders (that may be realized with READ-ONLY memories), while the third type of counter uses quasi-digital (i.e., analog current summing) techniques to generate an analog signal proportional to the count which is then digitized.
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Earl E. Swartzlander (1973) studied this question.
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