Fault-tolerant techniques for nanocomputers

The proposed nanometre-sized electronic devices are generally expected to show an increased probability of errors both in manufacturing and in service. Hence, there is a need to use fault-tolerant techniques in order to make reliable information processing systems out of those devices. Here we examine and compare four fault-tolerant techniques: R -fold multiple redundancy; cascaded triple modular redundancy; von Neumann's multiplexing method; and a reconfigurable computer technique. It is shown that the reconfiguration technique is the most effective technique, able to cope with manufacturing defect rates of the order of 0.01-0.1, but the technique requires enormous amounts of redundancy, of the order of 10 3 -10 5 . However, in the case of transient errors, multiple modular redundancy and multiplexing are the only feasible options.