A Transimpedance Amplifier With a Tunable Bandwidth in 0.18-μm CMOS

In this paper, a transimpedance amplifier (TIA) with a tunable 3-dB bandwidth is presented for optical communications. The proposed TIA is composed of two cascaded stages in which an input network with inductive peaking elements is employed in the first stage for broadband operations while a modified distributed amplifier is utilized as the second stage for enhanced transimpedance gain. In addition, a feedback loop is incorporated as the bandwidth-tuning mechanism. By tuning the bandwidth of the TIA, optimum circuit operation with lowest bit error rate (BER) can be achieved in the receiver frontend for high-speed data transmission. The proposed circuit is implemented in a 0.18-μm CMOS process. Consuming a dc power of 33.3 mW forms a 1.8-V supply, the fabricated TIA exhibits a transimpedance gain of 47.8 dB·Ω and a variable 3-dB bandwidth from 6.2 to 10.5 GHz. Provided a 211-1 pseudorandom bit sequence at 9-15 Gb/s, a BER less than 10-12is demonstrated experimentally by the TIA with the bandwidth tuning mechanism.