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A 40-Gb/s transimpedance amplifier (TIA) is realized in 0.18-μmCMOS technology. From the measured S-parameters, a transimpedance gain of 51dBΩand a 3-dB bandwidth up to 30.5 GHz were observed. A bandwidth enhancement technique,π-type inductor peaking (PIP), is proposed to achieve a bandwidth enhancement ratio (BWER) of 3.31. In addition, the PIP topology used at the input stage decreases the noise current as the operation frequency increases. Under a 1.8 V supply voltage, the TIA consumes 60.1 mW with a chip area of1.17× 0.46\ mm². The proposed CMOS TIA presents a gain–bandwidth product per DC power figure of merit( GBP/Pdc)of 180.1GHzΩ/mW.
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Jin et al. (2008) studied this question.
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