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A clocked multiplexer circuit was realised which provided 4.48 Gbit/s, 5 Gbit/s, and 7.84 Gbit/s output-pulse streams for p.c.m.-type input tributaries at 1.12 Gbit/s, 0.25 Gbit/s, and 1.12 Gbit/s, respectively. The circuit employed essentially ultra-broadband 180° hybrids, step-recovery diodes, and GaAs Schottky-barrier diodes. Output voltages up to 2 V were obtained across a load of 50 Ω. The pulse width of the output pulses was approximately 100 ps.
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Barabas et al. (1978) studied this question.
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