As microchips become smaller, the threat of damage to the device elements of Si semiconductors by charging during plasma etching will become significant. It will be of first importance to establish a plasma-etching technique that does not involve charging, i.e., “charging-free plasma processing.” Here, we utilize the effect of negative charge acceleration under a double layer in order to neutralize the charge inside a microstructure exposed to plasma etching. We have constructed a dual measurement system consisting of an emission in an interface and a contact hole charging on a SiO2 wafer during etching in two-frequency capacitively coupled plasma (2f-CCP) in CF4/Ar and pure Ar. A reduction in charging voltage is measured in the pulsed operation both of the plasma power source and of the wafer bias in the 2f-CCP in electronegative gases, CF4/Ar.
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Ohmori et al. (2003) studied this question.
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