A VLSI fuzzy logic controller with reconfigurable, cascadable architecture

A general-purpose fuzzy logic inference engine for real-time control applications, designed and fabricated in a 1.1- μm, 3.3-V, double-level-metal CMOS technology, is discussed. Up to 102 rules are processed in parallel with a single 688 K transistor device. Features include a dynamically reconfigurable and cascadable architecture, TTL-compatible host interface, laser-programmable redundancy, a special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification.