The fabrication of microstructures with minimum dimensions below 100 nm introduces several additional problems not normally associated with electron-beam lithography at the 1/2 to 1 μm level. The quality of a 100 nm resist image, when defined by an electron beam pattern generator, depends strongly upon the exposure conditions such as beam energy and dose. Another important factor is the substrate, since it greatly influences the range and amount of backscattered electrons and, hence, the exposure contrast achievable in a given resist system. There is generally a big difference in energy deposited in the resist whether the exposure is performed on a thin membrane, on bulk silicon, or on a thick layer of a heavy metal, and also whether a single thin layer of resist or thick two or three-layer systems are used. The characteristics of the resist and the development process itself are important aspects, too. In addition to controlling the resist image, one must also consider the properties and requirements of the subsequent transfer process to the working material such as lift-off, plating, ion milling, and reactive ion etching. The specific process is often dictated by the materials and the geometry of the particular structure to be fabricated. So, as many of the conditions interact, it is impossible to define a single process that would be suitable for the wide range of applications that structures of this size are intended for. Using examples of x-ray zone plates and FET gate definition, we discuss the merits of some of the processes used together with the techniques and problems associated with the evaluation of process performance at these dimensions.
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Kern et al. (1983) studied this question.
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