Controlled Topology of Block Copolymer Gate Insulators by Selective Etching of Cylindrical Microdomains in Pentacene Organic Thin Film Transistors

We investigate the effect of surface topology of a block copolymer/neutral surface/SiO 2 trilayered gate insulator on the properties of pentacene organic thin film transistor (OTFT) by the controlled etching of self assembled poly(styrene‐ b ‐methyl methacrylate) (PS‐ b ‐PMMA) block copolymer. The rms roughness of the uppermost block copolymer film directly in contact with pentacenes was systematically controlled from 0.27 nm to approximately 12.5 nm by the selective etching of cylindrical PMMA microdomains hexagonally packed and aligned perpendicular to SiO 2 layer with 20 and 38 nm of diameter and periodicity, respectively. Both mobility and On/Off ratio were significantly reduced by more than 3 orders of magnitudes with the film roughness in OTFTs having 60 nm thick pentacene active layer. The poor device performance observed with the etched thin film of block copolymer dielectric is attributed to a defective pentacene active layer and the mixed crystalline structure consisting of thin film and bulk phase arising from the massive nucleation of pentacene preferentially at the edge of each cylindrical etched hole.