Investigating the Correlation Between Material Ferroelectricity and Silicon-Channel FeFET Performance: Insights for Material Engineering in Device Optimization

A systematic study was conducted in this work to investigate the influence of HfO2-based material ferroelectricity parameters on various device-level performance of silicon-channel ferroelectric (FE) field-effect transistors (Si FeFETs). Through extensive experiments, we have unearthed several key findings: (1) Reducing the remnant polarization (Pr) to an optimal value can effectively enhance endurance without significant memory window (MW) degradation. (2) LargerPrexacerbates charge trapping (CT) during the writing operations but surprisingly improves the read-after-write (RAW) delay. This improvement is attributed to the opposing effects of the enlarged depolarization field and charge detrapping on the channel current. (3) For a fixed applied voltage that is effective for FE switching, a moderate increase in coercive electric field (EC) can co-optimize MW and retention characteristics without compromising endurance. Motivated by these observations, we developed a comprehensive model for Si FeFETs to provide an in-depth understanding of the underlying mechanisms and elucidate the intricate correlations between material and device characteristics. Through rigorous experiments and simulations, our work aims to provide guidelines for designing and optimizing Si FeFETs performance through material ferroelectricity engineering.