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During the last half century, a dramatic downscaling of electronics has taken place, a miniaturization that the industry expects to continue for at least a decade. We present efforts to use the self-assembly of one-dimensional semiconductor nanowires1 in order to bring new, high-performance nanowire devices as an add-on to mainstream Si technology. The nanowire approach offers a coaxial gate-dielectric-channel geometry that is ideal for further downscaling and electrostatic control, as well as heterostructure-based devices on Si wafers.
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Thelander et al. (2006) studied this question.
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