A Fully Integrated Dual-Band CMOS Power Amplifier Using a Variable Switched Interstage Matching Network

This work demonstrates a dual-band, two-stage power amplifier designed for WLAN and Wi-MAX applications (2/5 GHz) in 0.18 um complementary metal oxide semiconductor (CMOS) technology. Dual-band operation is achieved by only varying a switchable inductor in the interstage matching network and low-Q broadband on-chip input and output matching networks. This reduces the need for dual-band off-chip matching networks, thus making the design area efficient. The post-layout simulation results indicate a maximum Psat of 17.8/16.3 dBm and a peak power-added efficiency (PAE) of 26/15% at 2/5 GHz. Measurements of a Quad Flat No Lead (QFN) packaged version indicate a maximum Psat of 16.2 dBm and a PAE of 26% and harmonic contents below −12.5 dBc. Most importantly, the proposed power amplifier occupies a core area of only 0.9 mm2 and does not use any off-chip component.