In this paper, a sense amplifier based radiation hardening (RADHARD) flip flop design is presented. The sense amplifier based master stage reduces the loading to the clock network. The proposed improvement on the slave stage shortens the data to Q delay. The simulation results indicate that the proposed design has a shorter data to Q delay than the flip flop design used in Alpha 21264 microprocessors. The proposed design can be fabricated in the mainstream commercial digital complementary metal oxide semiconductor process.
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Wang et al. (2004) studied this question.
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