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To investigate the thermal behavior of 3-D integrated circuits, long computational times are required for large-scale stacked chips with a complicated structure. In this paper, an equivalent anisotropic thermal model is introduced to reduce the computational time resulting from complicated numerical integration. By introducing the equivalent model, the complex nature of the through-silicon via (TSV) structure can be overcome. Our algorithm not only considers the anisotropic structure of the TSV and the orientation of the heat flux, but also considers the influence of the thermal coupling between TSVs. The finite-element method solver COMSOL is used for comparison with the proposed model, revealing a good agreement between the results of the simulation and the proposed models. The maximum deviation is less than 5%, indicating the accuracy of the proposed model, and the computational time of our model is reduced by 95.5%. In addition, parametric studies and studies of the structure are performed in order to further verify the accuracy of the proposed method and understand the main factors affecting the thermal behavior of a stacked 3-D chip.
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Chai et al. (2019) studied this question.
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