An Investigation of the Different Charge Trapping Mechanisms for SiNx and SiO2 Gate Insulator in a-IGZO TFTs

We investigated the threshold voltage (V TH ) shifts of a-IGZO thin-film transistors (TFTs) in which the gate-insulator was either SiO 2 or SiN x . The V TH shift of the TFT using a SiO 2 obeyed the stretched-exponential time model, and increased sharply according to temperature increase, whereas the SiN x device obeyed the logarithmic time model, and exhibited weak temperature dependence. We found that an inter-layer formed between the IGZO and the SiN x , whose existence can be the origin of poor bias stability and the different V TH shift behavior in a-IGZO TFTs because the inter-layer accelerates the direct charge injection from the channel.