The paper describes a non-linear analogue-to-digital converter (NL-ADC) whose output is proportional to the natural logarithm of the input voltage. It is based on Maclaurin's series of the natural logarithm function. The design is based on voltage-to-frequency conversion (VFC) and a decimal rate multiplier (DRM). The NL-ADC introduces four digital numbers proportional to the first, second, third and fourth powers of the input DC signal. These numbers are digitally added and subtracted according to the first four terms of Maclaurin's series. A microprocessor-controlled hybrid computer with efficient analogue devices is used in the circuit design and implementation.
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Hafeth et al. (1985) studied this question.
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