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The aim is to explore the viability of a post-CMOS ternary computing paradigm using photonically gated devices.

August 13, 2026Open Access

Photonic Balanced Ternary Computing: A Perspective on the Post-CMOS Paradigm

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The aim is to explore the viability of a post-CMOS ternary computing paradigm using photonically gated devices.
Discusses the integration of quantum transport physics and balanced ternary arithmetic in computing.
Outlines three independent simulation methods: NEGF quantum transport, GW-BSE optical response, and molecular dynamics.
Proposes a device architecture encoding trits as symmetric current states, emphasizing zero as true absence of signal.
The proposed ternary computing paradigm is supported by independent simulation methods.
The architecture enables advancements in GPU-accelerated simulation and offers a full stack including software.
Twelve patent applications have been filed, detailing device and logic innovations for future exploration.

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Perspective on practical ternary computing in light of advancements in device technology and simulation methods.

Manish Thatte (2026) studied this question.

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