Technical overview demonstrates stringent jitter thresholds in millimeter-wave frequency synthesis, highlighting the need for novel locking architectures beyond digital phase-locked loops.
To address the relentless increase in data rates in wireless communication systems employing advanced modulation schemes, such as 5G frequency range (FR) 2 [seeFigure 1(a)], generating mm-wave signals with minimal integrated phase noise (PN) or RMS jitter is of paramount concern[1].Figure 1(b)specifies the required jitter to achieve the targeted EVM performance. For instance, for an EVM of less than 3.5%, as needed by a 256-QAM 28-GHz carrier, the RMS jitter contributed by the LO must be below 200 fs. As the carrier frequency or the symbol constellation density increases, the required RMS jitter becomes even more stringent. For example, 1024 QAM at 39 GHz demands an RMS jitter of[2],[3],[4].
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Siriburanon et al. (2025) studied this question.
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